The monolithic integration of III-V compound semiconductor based optoelectronic devices, high electron mobility transistors and Si CMOS devices on a single platform can serve to increase functionality, reliability and provide the path towards novel integrated circuits (ICs) of the future. There are several research groups worldwide which have been working on the epitaxial growth of III-V compound semiconductors and their respective devices on cost-effective silicon substrates. A central issue in III-V integration with Si is related to the compatibility of device design, as well as that of growth and processing conditions, between III-V semiconductors and Si. These need to be managed to allow the integration of III-V devices such as light emitting diodes, high electron mobility transistors and low dimensional semiconductor device technologies with Si CMOS digital and mixed-signal ICs.
This symposium will provide a forum to survey the latest achievements covering scientific and technological exploration in the field of III-V semiconductor integration with Si and other substrates, bringing together all relevant concepts, such epitaxy of III-V semiconductors, device fabrication, characterization, and device integration with CMOS on silicon substrates.
Therefore, this symposium will cover, but is not limited to, all the following topics.
- Epitaxial growth of III-Nitride, III-Arsenide, III-Phosphide and their alloys on 200 mm Si substrate
- Epitaxial growth of III-Nitride, and III-Nitride Devices on other substrates
- Key technological concepts for high lattice mismatch and thermal mismatch management for III-V epitaxy on 200 mm Si substrate
- Growth and fabrication of red, green and blue LEDs and AlGaN/GaN HEMTs and InGaAs/InP HEMTs
- Growth and fabrication of photovoltaic solar cells
- Integration of III-V LEDs and HEMT on 200 mm Si substrate
- CMOS-compatible device epitaxy and fabrication
- Structural, optical and electrical characterization of the materials
- Defect characterization and analysis
- Thermal management of on-chip device
- Simulation and modelling
- Other relevant technologies and devices associated with III-V on Silicon and other substrates
Papers reviewed and presented at this symposium will be published in Procedia Engineering by Elsevier.
Tsutomu ARAKI, Ritsumeikan University, Japan
Xinyu BAO, Applied Materials, USA
Peng CHEN, Nanjing University, China
Lukas CZORNOMAZ, IBM Zurich, Switzerland
Hiroshi FUJIOKA, Tokyo University, Japan
Rinus LEE, Globalfoundries, USA
Kwang Hong LEE, SMART, Singapore
Steven A. RINGEL, Ohio State University, USA
Fabrice SEMOND, CRHEA, CNRS, France
Shinichi TAKAGI, Tokyo University, Japan
Voon Yew, Aaron THEAN, National University of Singapore, Singapore
Julie WIDIEZ, CEA, France